Features
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FPGA chip: GW1NR-9 with 8640 LUT4 logical units
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Onboard USB to JTAG&UART debugger
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Onboard screen connector
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Onboard RGB screen connector
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Onboard 1.14-inch SPI screen connector
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Onboard 32M-bit SPI FLASH
Description
Tang Nano 9K is an exquisite development board based on the GW1NR-9 FPGA chip featuring 6840 flip flops and an extended DRAM of 64Mbit. Compare to the predecessor Tang Nano 1K and Tang Nano 4K with about 1152 and 4608 LUTs respectively, Tang Nano 9K has increased the limits to around 8640 LUT4 logic units. These logic units can not only be used for various complex logic circuit designing but also used for running a complete PicoRV softcore. It meets various needs of users, such as learning FPGA, verifying softcore, and further design.
It equips with an HDMI connector, RGB screen interface connector, SPI screen connector, 32Mbit SPI flash, and 6 LEDs, so users can use it for FPGA verification, RISC-v softcore verification, and basic function verification easily and quickly.
Specification
Parameter |
Detail |
Logic unit(LUT4) |
8640 |
Registers(FF) |
6840 |
ShadowSRAM SSRAM(bits) |
17280 |
Block SRAM BSRAM |
468K |
Number of B-SRAM |
26 |
User flash(bits) |
608K |
SDR SDRAM(bits) |
64M |
18 x 18 Multiplier |
20 |
SPI FLASH |
32M-bit |
Number of PLL |
2 |
Dimensions |
Approximately 65 x 23mm |
Power |
5V via USB connector |
Display interface |
HDMO interface, SPI screen interface, RGB screen interface |
Debugger |
Onboard BL702 chip provides USB-JTAG and USB-UART functions for GW1NR-9 |
IO |
Support 4mA,8mA, 16mA, 24mA other driving capabilities Provides independent Bus Keeper, pull-up/pull-down resistors, and Open Drain output options for each I/O |
Connector |
TF card slot, 2x24P 2.54mm Header pads |
Button |
2 programmable buttons for users |
LED |
Onboard 6 programmable LEDs |
Partlist
Tang Nano 9k board |
1 |
Type-C Data Cable |
1 |
24Pin header |
2 |
Tang Nano Framework
Dimensions
Matters need attention
- It is recommended to use Gowin V1.9.8.03 Education Edition:
But if you want to use more IP cores, you need to download other versions of IDE, and apply for a license: - This version of a programmer is recommended:
- Avoid using JTAG, MODE0/1, and DONE pins. If you really need to use these pins, please refer to the to see how to enable IO mux.
- Please avoid static electricity hitting PCBA; Please release the static electricity from the hand before contacting PCBA
- The working voltage of each GPIO has been marked in the schematic. Please do not let the actual working voltage of GPIO exceed the rated value, because it will cause permanent damage to PCBA
- When connecting FPC flexible cable, make sure that the cable is completely inserted into the cable without offset
- Avoid any liquid or metal touching the pads of components on PCBA during working, because this will cause a short circuit and damage PCBA
ECCN/HTS
HSCODE | 8543709990 |
UPC |